I was asked to give a brief talk on FPGAs and the ecosystem surrounding them as part of the 9th Open Source Hardware User Group Meeting (details) last month. Since programmable logic is one of my favourite topics, I accepted the challenge and started putting a few slides together. After a few hours of wrestling with PowerPoint (and creating far too many slides) it dawned on me that I only had around 20 minutes for this introductory talk so I then spent an entire day trimming down the slide deck. Here’s what I ended up with:

A Quick Introduction to Programmable Logic

Skills Matter, our host for OSHUG #9, kindly posted a video of my talk on their website (under the ‘ajax’-ria’ category, funny enough) so erm, if you want to, erm, watch me, erm, talk, erm, head over to this link. The lack of ‘flow’ in my previous sentence will become apparent as soon as you click play (Apologies if you were in the crowd, in my defence I was quite sleep deprived!)

Jokes aside, I hope the presentation succeeded in it’s goal of giving the audience a brief introduction to the subject of programmable logic. The reception was quite good and the discussion during the Q&A bit and later at the pub was quite interesting!

Since I had to skip a few things in the slides and forgot to mention some important bits verbally, here are a few notes to accompany the video/slides:

  • I briefly mention the fact that FPGAs do not have a fixed instruction-set as conventional processors do. This is the most significant advantage of employing FPGAs in a project since you can really create a ‘tailor-made’ system for your particular application. Arbitrary bus widths or unusual communication links are not a problem! The inherent parallelism of hardware coupled with the dedicated resources such as DSP blocks and high speed transceivers really lets us push quite a few bits in and out of these devices.
  • The state of open-source in programmable logic is pretty appalling, I don’t know of any complete toolchains capable of going through the entire synthesis stages producing a bitstream and for the reasons I have mentioned in my talk it doesn’t seem likely that we will see much support from vendors in this area any time soon.
  • Another problem is the lack of standardised workflows or frameworks for projects. Designers usually stick to the in-house rules or make them up as they go along but for people who are just getting started with the horrible toolchains this is a major issue. Saar Drimer, who is the chief hunter gatherer of Boldport and an FPGA expert has an interesting proposal covering this.
  • Last but not least: as FPGA devices evolve, they push the boundaries of silicon fabrication technology and open up new possibilities for designers. This is really exciting so keep an eye out for Xilinx’s Zynq and Intel’s ‘Stellarton’ family of devices which (I think) will change the way we approach embedded design problems in the future :)

If you have any comments/suggestions please feel free to chime in with a comment below.