Pulse width modulation library headers.
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#define | BCM2708_PERI_BASE 0x20000000 |
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#define | CLOCK_BASE (BCM2708_PERI_BASE + 0x101000) /* Clocks */ |
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#define | GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO */ |
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#define | PWM_BASE (BCM2708_PERI_BASE + 0x20C000) /* PWM */ |
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#define | GPIO_SET0 *(gpio+7) /* Set GPIO high bits 0-31 */ |
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#define | GPIO_SET1 *(gpio+8) /* Set GPIO high bits 32-53 */ |
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#define | GPIO_CLR0 *(gpio+10) /* Set GPIO low bits 0-31 */ |
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#define | GPIO_CLR1 *(gpio+11) /* Set GPIO low bits 32-53 */ |
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#define | PWMCLK_CNTL *(clk+40) |
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#define | PWMCLK_DIV *(clk+41) |
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#define | PWM_CONTROL *pwm |
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#define | PWM_STATUS *(pwm+1) |
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#define | PWM0_RANGE *(pwm+4) |
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#define | PWM1_RANGE *(pwm+8) |
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#define | PWM0_DATA *(pwm+5) |
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#define | PWM1_DATA *(pwm+9) |
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#define | PWM1_MS_MODE 0x8000 /* Run in MS mode */ |
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#define | PWM1_USEFIFO 0x2000 /* Data from FIFO */ |
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#define | PWM1_REVPOLAR 0x1000 /* Reverse polarity */ |
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#define | PWM1_OFFSTATE 0x0800 /* Ouput Off state */ |
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#define | PWM1_REPEATFF 0x0400 /* Repeat last value if FIFO empty */ |
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#define | PWM1_SERIAL 0x0200 /* Run in serial mode */ |
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#define | PWM1_ENABLE 0x0100 /* Channel Enable */ |
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#define | PWM0_MS_MODE 0x0080 /* Run in MS mode */ |
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#define | PWM0_USEFIFO 0x0020 /* Data from FIFO */ |
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#define | PWM0_REVPOLAR 0x0010 /* Reverse polarity */ |
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#define | PWM0_OFFSTATE 0x0008 /* Ouput Off state */ |
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#define | PWM0_REPEATFF 0x0004 /* Repeat last value if FIFO empty */ |
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#define | PWM0_SERIAL 0x0002 /* Run in serial mode */ |
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#define | PWM0_ENABLE 0x0001 /* Channel Enable */ |
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#define | PWM_CLRFIFO 0x0040 /* Clear FIFO (Self clearing bit) */ |
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#define | PWMS_BUSERR 0x0100 /* Register access was too fast */ |
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#define | PAGE_SIZE (4*1024) |
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#define | BLOCK_SIZE (4*1024) |
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#define | INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) |
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#define | OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3)) |
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#define | SET_GPIO_ALT(g, a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) |
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#define | GPIO_SET0 *(gpio+7) /* Set GPIO high bits 0-31 */ |
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#define | GPIO_SET1 *(gpio+8) /* Set GPIO high bits 32-53 */ |
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#define | GPIO_CLR0 *(gpio+10) /* Set GPIO low bits 0-31 */ |
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#define | GPIO_CLR1 *(gpio+11) /* Set GPIO low bits 32-53 */ |
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#define | GPIO_PULL *(gpio+37) /* Pull up/pull down */ |
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#define | GPIO_PULLCLK0 *(gpio+38) /* Pull up/pull down clock */ |
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int | pwm_init () |
| Initialise the PWM peripheral.
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void | pwm_mode (unsigned int mode) |
| Set mode for the PWM peripheral.
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void | pwm_value (unsigned int value) |
| Set PWM value.
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void | pwm_release () |
| Releases the PWM peripheral and unmaps the memory.
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const unsigned int | PWM_MAX = 1024 |
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volatile unsigned int * | gpio |
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volatile unsigned int * | pwm |
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volatile unsigned int * | clk |
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Pulse width modulation library headers.
- Author
- Omer Kilic omerk.nosp@m.ilic.nosp@m.@gmai.nosp@m.l.co.nosp@m.m - Erlang Solutions
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Jeremy Bennett jerem.nosp@m.y.be.nosp@m.nnett.nosp@m.@emb.nosp@m.ecosm.nosp@m..com - Embecosm Limited
LICENSE
Copyright (C) 2013 Omer Kilic omerk.nosp@m.ilic.nosp@m.@gmai.nosp@m.l.co.nosp@m.m - Erlang Solutions Copyright (C) 2013 Jeremy Bennett jerem.nosp@m.y.be.nosp@m.nnett.nosp@m.@emb.nosp@m.ecosm.nosp@m..com - Embecosm Limited
This file is part of pihwm http://omerk.github.io/pihwm
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at:
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
Definition in file pi_pwm.h.